It is known in the art that radiation that strikes an SRAM memory cell can cause it to assume an incorrect state. If, in a conventional cross-coupled inverter SRAM cell, one node switches state, that will force the other node to follow suit, resulting in a stable configuration that contains incorrect data. The conventional way to make an SRAM cell radiation resistant is to add large polysilicon resistors in series with the inputs for each of the cross-coupled inverters. One drawback of this approach is that the formation of polysilicon resistors is a difficult step in the integrated circuit fabrication process. Further, the magnitude of the resistance is very sensitive to processing parameters and to the temperature of the device. In particular, for devices that must operate across the military specification range, this temperature dependence requires compensation in order to provide a device that works across the full temperature range. At cold temperatures, the resistance is very large, which greatly increases the time required to write data into the memory, and slows down the effective speed of the memory. At high temperatures, the resistance is smaller than at room temperature, which decreases the protection against radiation induced errors. The art has sought an SRAM memory cell that is resistant to radiation induced errors and is also not dependent on these temperature effects.